Intel pledges 80 cores in five years | CNET News.com
“Performance matters again,” Otellini said, disclosing that the quad-core desktop processor will deliver 70 percent faster integer performance than the Core 2 Duo, and the quad-core server processor will be 50 percent faster than the Xeon 5100 introduced in June.
But the ultimate goal, as envisioned by Intel’s terascale research prototype, is to enable a trillion floating-point operations per second–a teraflop–on a single chip. Ten years ago, the ASCI Red supercomputer at Sandia National Laboratories became the first supercomputer to deliver 1 teraflop using 4,510 computing nodes.
Intel’s prototype uses 80 floating-point cores, each running at 3.16GHz, Justin Rattner, Intel’s chief technology officer, said in a speech following Otellini’s address. In order to move data in between individual cores and into memory, the company plans to use an on-chip interconnect fabric and stacked SRAM (static RAM) chips attached directly to the bottom of the chip, he said.
Intel’s work on silicon photonics, including its recent announcement of a silicon laser, could help contribute toward the core-to-core connection challenge.
Connecting chips directly to each other through tiny wires is called Through Silicon Vias, which Intel discussed in 2005. TSV will give the chip an aggregate memory bandwidth of 1 terabyte per second.
Intel, meanwhile, began to discuss replacing wires with optical technology in computers and chips in 2001 and has come out with several experimental parts for enabling lasers and optical technology to replace wires. [Entire article]